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1

[IEEE 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsin Chu, Taiwan (2010.04.26-2010.04.29)] Proceedings of 2010 International Symposium on VLSI Design, Automation and Test - A low-area and short-time scan-based embedded delay measurement using signature registers

Katoh, Kentaroh, Namba, Kazuteru, Ito, Hideo

Year:

2010

Language:

english

File:

PDF, 233 KB

english, 2010

2

[IEEE 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) - Rome, Italy (2007.09.26-2007.09.28)] 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) - Fault Tolerant SoC Architecture Design for JPEG2000 using Partial Reconfigurability

Doumar, Abderrahim, Katoh, Kentaroh, Ito, Hideo

Year:

2007

Language:

english

File:

PDF, 440 KB

english, 2007

3

[IEEE 2009 Asian Test Symposium - Taichung, Taiwan (2009.11.23-2009.11.26)] 2009 Asian Test Symposium - A Delay Measurement Technique Using Signature Registers

Katoh, Kentaroh, Tanabe, Toru, Zahidul, Haque Md, Namba, Kazuteru, Ito, Hideo

Year:

2009

Language:

english

File:

PDF, 422 KB

english, 2009

4

[IEEE 2010 19th Asian Test Symposium (ATS) - Shanghai, China (2010.12.1-2010.12.4)] 2010 19th IEEE Asian Test Symposium - A Low Area On-chip Delay Measurement System Using Embedded Delay Measurement Circuit

Katoh, Kentaroh, Namba, Kazuteru, Ito, Hideo

Year:

2010

Language:

english

File:

PDF, 251 KB

english, 2010

5

[IEEE 2013 22nd Asian Test Symposium (ATS) - Yilan County, Taiwan (2013.11.18-2013.11.21)] 2013 22nd Asian Test Symposium - Digital Compensation for Timing Mismatches in Interleaved ADCs

Yi, Ru, Wu, Minghui, Asami, Koji, Kobayashi, Haruo, Khatami, Ramin, Katayama, Atsuhiro, Shimizu, Isao, Katoh, Kentaroh

Year:

2013

Language:

english

File:

PDF, 1.80 MB

english, 2013

6

[IEEE 2013 22nd Asian Test Symposium (ATS) - Yilan County, Taiwan (2013.11.18-2013.11.21)] 2013 22nd Asian Test Symposium - An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators

Katoh, Kentaroh, Doi, Yuta, Ito, Satoshi, Kobayashi, Haruo, Li, Ensi, Takai, Nobukazu, Kobayashi, Osamu

Year:

2013

Language:

english

File:

PDF, 744 KB

english, 2013

7

[IEEE 2012 IEEE 1st Global Conference on Consumer Electronics (GCCE) - Tokyo, Japan (2012.10.2-2012.10.5)] The 1st IEEE Global Conference on Consumer Electronics 2012 - Time-multiplexed on-chip delay measurement for dependable high-speed digital LSIs

Katoh, Kentaroh, Itagaki, Kei, Hoshina, Shinichiro

Year:

2012

Language:

english

File:

PDF, 205 KB

english, 2012

8

A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator

Katoh, Kentaroh, Kobayashi, Yutaro, Chujo, Takeshi, Wang, Junshan, Li, Ensi, Li, Congbing, Kobayashi, Haruo

Journal:

Journal of Electronic Testing

Year:

2014

Language:

english

File:

PDF, 983 KB

english, 2014

9

Erratum to: A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator

Katoh, Kentaroh, Kobayashi, Yutaro, Chujo, Takeshi, Wang, Junshan, Li, Ensi, Li, Congbing, Kobayashi, Haruo

Journal:

Journal of Electronic Testing

Year:

2015

Language:

english

File:

PDF, 67 KB

english, 2015

10

[IEEE 2014 19th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW) - Porto Alegre, Brazil (2014.9.17-2014.9.19)] 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings - Experimental verification of timing measurement circuit with self-calibration

Chujo, Takeshi, Hirabayashi, Daiki, Congbing Li,, Kobayashi, Yutaro, Junshan Wang,, Kobayashi, Haruo, Katoh, Kentaroh, Koshi, Sato

Year:

2014

Language:

english

File:

PDF, 2.50 MB

english, 2014

11

Thickness-modulated InGaAs/GaAsP superlattice solar cells on vicinal substrates

Fujii, Hiromasa, Katoh, Takumi, Toprasertpong, Kasidit, Sodabanlu, Hassanet, Watanabe, Kentaroh, Sugiyama, Masakazu, Nakano, Yoshiaki

Journal:

Journal of Applied Physics

Year:

2015

Language:

english

File:

PDF, 3.91 MB

english, 2015

12

[IEEE 2015 16th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2015.3.2-2015.3.4)] Sixteenth International Symposium on Quality Electronic Design - A low area calibration technique of TDC using variable clock generator for accurate on-line delay measurement

Katoh, Kentaroh, Namba, Kazuteru

Year:

2015

Language:

english

File:

PDF, 296 KB

english, 2015

13

Quantum wire-on-well (WoW) cell with long carrier lifetime for efficient carrier transport

Sugiyama, Masakazu, Fujii, Hiromasa, Katoh, Takumi, Toprasertpong, Kasidit, Sodabanlu, Hassanet, Watanabe, Kentaroh, Alonso-Álvarez, Diego, Ekins-Daukes, Nicholas J., Nakano, Yoshiaki

Journal:

Progress in Photovoltaics: Research and Applications

Year:

2016

Language:

english

File:

PDF, 1.55 MB

english, 2016

14

Analog/mixed-signal circuit design in nano CMOS era

Kobayashi, Haruo, Aoki, Hitoshi, Katoh, Kentaroh, Li, Congbing

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 1.33 MB

english, 2014

15

Two-Stage Stuck-at Fault Test Data Compression Using Scan Flip-Flops with Delay Fault Testability

Katoh, Kentaroh, Namba, Kazuteru, Ito, Hideo

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2008

Language:

english

File:

PDF, 920 KB

english, 2008

16

Design for Delay Fault Testability of 2-Rail Logic Circuits

KATOH, Kentaroh, NAMBA, Kazuteru, ITO, Hideo

Journal:

IEICE Transactions on Information and Systems

Year:

2009

Language:

english

File:

PDF, 455 KB

english, 2009

17

Design for Delay Fault Testability of Dual Circuits Using Master and Slave Scan Paths

KATOH, Kentaroh, NAMBA, Kazuteru, ITO, Hideo

Journal:

IEICE Transactions on Information and Systems

Year:

2009

Language:

english

File:

PDF, 931 KB

english, 2009